NVIDIA CUDA 13.5 Brings NVIDIA Vera Rubin GA Support

Nvidia’s CUDA Toolkit 13.5 is general availability for the Vera Rubin GPU architecture, moving that platform from early developer access into enterprise production readiness. Windows on Arm support also extends to DGX Station for Windows.

Beyond the architecture badge, 13.5 ships locality-domain SM partitioning choices, Multi-Process Service v3 with weighted timeslicing and SM borrow/lend load balancing, CUDA Tile multi-GPU communication over NVLink/NVSwitch, a public preview of Tile–SIMT library interop, cuda.core 1.2 batched copies and graph updates, CCCL 3.5 tuning and batched Top-K, and a public preview of Nsight Perf SDK for AI.

If you buy or rent Rubin-class capacity, this is the toolkit that makes it a real target — not a preview island.

Hardware generations don’t land when the silicon ships. They land when CUDA says GA. That’s the desk read on 13.5. Vera Rubin support going production-ready is the headline enterprises will brief boards with; the rest of the release is Nvidia tightening the software that keeps GPUs busy and debuggable.

MPS v3 is the quiet operator story. Weighted timeslicing, partitions that can borrow and lend SMs, cgroup-based routing into MPS namespaces — this is multi-tenant and multi-workload reality on fat GPUs. AI factories that pack inference and training adjacency need exactly this kind of control, or they waste silicon enforcing crude isolation.

CUDA Tile’s multi-GPU unicast/multicast paths and the Tile-to-SIMT interop preview matter for people writing the next fused kernels. Being able to call NVSHMEM, CCCL Coop, Warp, or MathDx routines from inside Tile code — on data already in registers or shared memory — removes a painful kernel-boundary tax. It’s preview, library-only for now; your own __device__ functions come later.

On the Python side, copy_batch, programmatic dependent launch, and graph node updates without reinstantiation are the difference between research scripts and production loops. CCCL’s batched Top-K landing in FlashInfer is a direct LLM-inference breadcrumb.

We’re for a software stack that keeps pace with the iron. The downside of this cadence is platform lock-in depth: every MPS knob, Tile extension, and Nsight workflow makes “just move the workload” harder. That’s not a reason to skip 13.5. It’s a reason to measure portability deliberately.

Rubin-era Windows drops Tesla Compute Cluster mode; WDDM and MCDM are the supported paths, with MCDM as the compute-only model. Math libraries in the same release advertise faster NVFP4/MXFP8 GEMMs on Vera Rubin, Ozaki-II for more FP64 symmetric updates, and a pile of cuSPARSE and nvJPEG speedups — the usual CUDA toolkit companion wave.